• bamboo@lemm.ee
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    4 months ago

    All else being equal, a complex decoding pipeline does reduce the efficiency of a processor. It’s likely not the most important aspect, but eventually there will be a point where it does become an issue once larger efficiency problems are addressed.

    • 737@lemmy.blahaj.zone
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      4 months ago

      yeah, but you could improve the not ideal encoding with a relatively simple update, no need to throw out all the tools, great compatibility, and working binaries that intel and amd already have.

      its also not the isa’s fault

      • bamboo@lemm.ee
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        4 months ago

        Well, not exactly. You have to remove instructions at some point. That’s what Intel’s x86-S is supposed to be. You lose some backwards compatibility but they’re chosen to have the least impact on most users.

        • 737@lemmy.blahaj.zone
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          4 months ago

          Would this actually improve efficiency though or just reduce the manufacturing and development cost?

          • bamboo@lemm.ee
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            4 months ago

            Instruction decoding takes space and power. If there are fewer, smaller transistors dedicated to the task it will take less space and power.